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24 Chapter 5. objdump

-M options

-disassembler-options=options

Pass target speciﬁc information to the disassembler. Only supported on some targets. If it is

necessary to specify more than one disassembler option then multiple -M options can be used or

can be placed together into a comma separated list.

If the target is an ARM architecture then this switch can be used to select which register name set

is used during disassembler. Specifying -M reg-name-std (the default) will select the register

names as used in ARM’s instruction set documentation, but with register 13 called ’sp’, register

14 called ’lr’ and register 15 called ’pc’. Specifying -M reg-names-apcs will select the name

set used by the ARM Procedure Call Standard, whilst specifying -M reg-names-raw will just

use r followed by the register number.

There are also two variants on the APCS register naming scheme enabled by -M

reg-names-atpcs and -M reg-names-special-atpcs which use the ARM/Thumb

Procedure Call Standard naming conventions. (Either with the normal register names or the

special register names).

This option can also be used for ARM architectures to force the disassembler

to interpret all instructions as Thumb instructions by using the switch

-disassembler-options=force-thumb. This can be useful when attempting to

disassemble thumb code produced by other compilers.

For the x86, some of the options duplicate functions of the -m switch, but allow ﬁner grained

control. Multiple selections from the following may be speciﬁed as a comma separated string.

x86-64, i386 and i8086 select disassembly for the given architecture. intel and att select

between intel syntax mode and AT&T syntax mode. addr32, addr16, data32 and data16

specify the default address size and operand size. These four options will be overridden if

x86-64, i386 or i8086 appear later in the option string. Lastly, suffix, when in AT&T mode,

instructs the disassembler to print a mnemonic sufﬁx even when the sufﬁx could be inferred by

the operands.

For PPC, booke, booke32 and booke64 select disassembly of BookE instructions. 32 and 64

select PowerPC and PowerPC64 disassembly, respectively.

For MIPS, this option controls the printing of register names in disassembled instructions. Mul-

tiple selections from the following may be speciﬁed as a comma separated string, and invalid

options are ignored:

gpr-names=ABI

Print GPR (general-purpose register) names as appropriate for the speciﬁed ABI. By default,

GPR names are selected according to the ABI of the binary being disassembled.

fpr-names=ABI

Print FPR (ﬂoating-point register) names as appropriate for the speciﬁed ABI. By default,

FPR numbers are printed rather than names.

cp0-names=ARCH

Print CP0 (system control coprocessor; coprocessor 0) register names as appropriate for

the CPU or architecture speciﬁed by ARCH. By default, CP0 register names are selected

according to the architecture and CPU of the binary being disassembled.

hwr-names=ARCH

Print HWR (hardware register, used by the rdhwr instruction) names as appropriate for the

CPU or architecture speciﬁed by ARCH. By default, HWR names are selected according to

the architecture and CPU of the binary being disassembled.

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